Path:OKDatasheet > Halbleiter Datenblatt > Lattice Datenblatt > M5LV-128/104-12VI
M5LV-128/104-12VI spec: 10ns fifth generation MACH architecture CPLD (Complex Programmable Logic Device)
Path:OKDatasheet > Halbleiter Datenblatt > Lattice Datenblatt > M5LV-128/104-12VI
M5LV-128/104-12VI spec: 10ns fifth generation MACH architecture CPLD (Complex Programmable Logic Device)
Hersteller : Lattice
Verpacken : TQFP
Pins : 100
Temperatur : Min -40 °C | Max 85 °C
Größe : 1126 KB
Application : 10ns fifth generation MACH architecture CPLD (Complex Programmable Logic Device)