Path:OKDatasheet > Halbleiter Datenblatt > Lattice Datenblatt > MACHLV210-15JC
MACHLV210-15JC spec: High density EE CMOS programmable logic, 64 macrocells, 32 outputs, 64 flip-flops; 2 clock choices, 15ns
Path:OKDatasheet > Halbleiter Datenblatt > Lattice Datenblatt > MACHLV210-15JC
MACHLV210-15JC spec: High density EE CMOS programmable logic, 64 macrocells, 32 outputs, 64 flip-flops; 2 clock choices, 15ns
Hersteller : Lattice
Verpacken : PLCC
Pins : 44
Temperatur : Min 0 °C | Max 70 °C
Größe : 243 KB
Application : High density EE CMOS programmable logic, 64 macrocells, 32 outputs, 64 flip-flops; 2 clock choices, 15ns