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SN74LVC112AD spec: DUAL NEGATIVE-EDGE-TRIGGERED J-K FLIP-FLOP WITH CLEAR AND PRESET
Path:OKDatasheet > Halbleiter Datenblatt > TI Datenblatt > SN74LVC112AD
SN74LVC112AD spec: DUAL NEGATIVE-EDGE-TRIGGERED J-K FLIP-FLOP WITH CLEAR AND PRESET
Hersteller : TI
Verpacken :
Pins : 16
Temperatur : Min -40 °C | Max 85 °C
Größe : 140 KB
Application : DUAL NEGATIVE-EDGE-TRIGGERED J-K FLIP-FLOP WITH CLEAR AND PRESET