Path:OKDatasheet > Halbleiter Datenblatt > Lattice Datenblatt > M5LV-256/120-7YC
M5LV-256/120-7YC spec: 7ns fifth generation MACH architecture CPLD (Complex Programmable Logic Device)
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M5LV-256/120-7YC Datenblatt und Spezifikationen
Hersteller : Lattice
Verpacken : PQFP
Pins : 100
Temperatur : Min 0 °C | Max 70 °C
Größe : 1126 KB
Application : 7ns fifth generation MACH architecture CPLD (Complex Programmable Logic Device)
M5LV-256/120-7YC PDF-Download