Path:OKDatasheet > Halbleiter Datenblatt > Lattice Datenblatt > M5LV-512/120-6YC
M5LV-512/120-6YC spec: 6ns fifth generation MACH architecture CPLD (Complex Programmable Logic Device)
Path:OKDatasheet > Halbleiter Datenblatt > Lattice Datenblatt > M5LV-512/120-6YC
M5LV-512/120-6YC spec: 6ns fifth generation MACH architecture CPLD (Complex Programmable Logic Device)
Hersteller : Lattice
Verpacken : PQFP
Pins : 100
Temperatur : Min 0 °C | Max 70 °C
Größe : 1126 KB
Application : 6ns fifth generation MACH architecture CPLD (Complex Programmable Logic Device)